Comments on: Brief Introduction to PCI – Part I http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/ Powerful words dude, powerful... Sat, 09 Jan 2010 17:06:29 +0000 hourly 1 http://wordpress.org/?v=3.0.1 By: Read This Link » Brief Introduction to PCI - Part I http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-43900 Read This Link » Brief Introduction to PCI - Part I Sat, 09 Jan 2010 17:06:29 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-43900 [...] Brief Introduction to PCI - Part I [...] [...] Brief Introduction to PCI – Part I [...]

]]> By: Selvaraj http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-32379 Selvaraj Wed, 28 Jan 2009 07:41:05 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-32379 good introduction! Formating Comment: Shall have a link from this page to the Part II. Thanks good introduction!

Formating Comment: Shall have a link from this page to the Part II.

Thanks

]]> By: evilbitz http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-20896 evilbitz Sun, 27 Jul 2008 16:54:20 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-20896 Jose, most of the devices has their own memory. Basically the memory address space that is accessible to the CPU is divided into two. RAM and MMIO. And the North Bridge (MCH) decides where to route each access made by the CPU in a simple way... if it is in the RAM area, pass the access to the memory controller, if it's not, pass the access to PCI. Jose, most of the devices has their own memory. Basically the memory address space that is accessible to the CPU is divided into two. RAM and MMIO. And the North Bridge (MCH) decides where to route each access made by the CPU in a simple way… if it is in the RAM area, pass the access to the memory controller, if it’s not, pass the access to PCI.

]]> By: Jose http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-4600 Jose Wed, 11 Jul 2007 20:39:49 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-4600 Am I correct in assuming that the device itself possesses no external memory? Does it share memory with the hardrive or ram? and, if so, then what exactly does a device comprise of, if it is devoid of a processor and it's own memory? I'm curious, evilbitz. Am I correct in assuming that the device itself possesses no external memory? Does it share memory with the hardrive or ram? and, if so, then what exactly does a device comprise of, if it is devoid of a processor and it’s own memory?

I’m curious, evilbitz.

]]> By: evilbitz http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-4040 evilbitz Wed, 13 Jun 2007 14:38:54 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-4040 Richard, most of the controllers on the PC architecture are connected through some kind of PCI bus ;-) The CPU accesses the PCI bus through the south bridge, where it is connected, although you can connect any kind of bus to the south/north bridge. It is widely accepted to use PCI. PCIe is connected through the north bridge actually, so fast graphic cards for instance can access the system RAM faster (it is connected to the north bridge as well). Richard, most of the controllers on the PC architecture are connected through some kind of PCI bus ;-)

The CPU accesses the PCI bus through the south bridge, where it is connected, although you can connect any kind of bus to the south/north bridge. It is widely accepted to use PCI.

PCIe is connected through the north bridge actually, so fast graphic cards for instance can access the system RAM faster (it is connected to the north bridge as well).

]]> By: Richard http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-2576 Richard Wed, 23 May 2007 23:43:52 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-2576 W.R.T "On Board devices" connected via PCI bus -- isn't that less true these days with more and more complex system controllers? W.R.T “On Board devices” connected via PCI bus — isn’t that less true these days with more and more complex system controllers?

]]> By: g kiran kumar http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-2547 g kiran kumar Wed, 23 May 2007 08:37:14 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-2547 Thanks, it gives a more clear picture about the functionality of PCI. Thanks,
it gives a more clear picture about the functionality of PCI.

]]> By: abdul musawwir http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-31 abdul musawwir Thu, 21 Dec 2006 17:53:13 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-31 Can external harddrives be connected via PCI Can external harddrives be connected via PCI

]]> By: Florii http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-30 Florii Wed, 20 Dec 2006 16:02:41 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-30 Isn't that supposed to be 1/33 of a millionth of a second? :) That's what Mega means. What you said would be correct if you're talking about a 33 Hz frequency. Otherwise a good introductory article ~ maybe you can also update it to show how you compute the theoretical peak transfer rate when you mention bus width and frequency. Cheers! Florii Isn’t that supposed to be 1/33 of a millionth of a second? :) That’s what Mega means. What you said would be correct if you’re talking about a 33 Hz frequency.

Otherwise a good introductory article ~ maybe you can also update it to show how you compute the theoretical peak transfer rate when you mention bus width and frequency. Cheers!

Florii

]]> By: evilbitz http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/comment-page-1/#comment-29 evilbitz Thu, 14 Dec 2006 07:56:55 +0000 http://www.evilbitz.com/2006/10/28/brief-introduction-to-pci-part-i/#comment-29 Thanks Jesse! I edited the article according to your suggestion. Thanks Jesse!
I edited the article according to your suggestion.

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